We are delighted to offer a free half day virtual workshop introducing programming in Rust.  The workshop is aimed at software engineers, who are already familiar with at least one other language.  The last part of the workshop is particularly aimed at those working with Embedded Systems and will use RISC-V as its reference platform.

The workshop is led by Philipp Krones, Team lead of the Rust linter, Clippy.

Numbers at this workshop are strictly limited, and registration is essential.  We expect heavy demand and will be maintaining a waitlist for those who do not get a ticket initially. If you register and subsequently find you can’t attend, please let us know, so we can release your place to someone else.

The workshop will use BigBlueButton as the videoconference technology.  Presentations will be recorded for the BCS Open Source SG YouTube Channel.

Agenda

• 12:00-13:30 – (optional) Setup Session
• 13:30-15:30 – Part 1 – Ecosystem, Basics, and your first Rust program
• 15:30-16:00 – Break / Q&A Session
• 16:00-18:00 – Part 2 – Advanced Rust Concepts, Embedded Rust (RISC-V)

Synopsis

“Rust – a language empowering everyone to build reliable and efficient
software” – https://rust-lang.org

Rust is a systems programming language focusing on performance, reliability and productivity. Rust achieves this by guaranteeing memory safety during compile time, without the need of any runtime or garbage collector. Its ecosystem provides modern features and tooling to make working with it as comfortable as possible.

Even though Rust has great documentation, like the Rust book, it still has a pretty steep learning curve. This workshop will help you to understand the
language and will give you a head start for your Rust journey.

In the first part of the workshop, we look at the tooling of Rust, discover the basics and write our first small Rust program. After that we go in a half hour
break, where you can relax and ask questions (you should do this also during the workshop, of course!). The second part will give you a sneak peek into advanced Rust concepts, empowering you to understand most of the code out there. We conclude the workshop by looking at embedded Rust by targeting a RISC-V platform with your second Rust program.

Preparation

Coming into the workshop 2 command line commands should work on your machine:

• rustup --version, with the output rustup 1.23.1 (3df2264a9 2020-11-30) (or similar)
• cargo --version, with the output cargo 1.48.0 (65cbdd2dc 2020-10-14) (or similar)

To get this set up, visit rustup.org and follow the steps on the website.

If you have trouble getting this set up, come and join the optional setup session at 12:00 and you will get help.

About the Speaker

Philipp Krones works for Embecosm in Nürnberg, specializing in the Rust tool chain and AI.  As a member of The Rust Programming Language organization, he leads the work on the Rust linter called Clippy. Rust is his favorite language and bringing the gift of Rust to other people is always a pleasure.

Open source code is widely used in education and training events. On this thematic evening, we’ll look into various aspects.

AGENDA
18:15 – Join online meeting to chat with other participants

18:30 – Short introduction (5 min) of the evening by Julian Kunkel and Marry Bennett

18:35 – Presentations

20:35 – Closing Discussion

We were live streaming via BigBlueButton and recording the talks for later posting on YouTube.

The videos are available in the playlist here.

Open Source in Teaching RISC-V

Video Presentation

RISC-V is an open instruction set architecture, attracting both open source and proprietary processor implementations. This makes it very attractive for education in computer organization and other courses. In this talk I will present our efforts to use and share open source implementations and tools for educational purposes.

Stefan Wallentowitz is Professor at Munich University of Applied Sciences, on the board of FOSSi Foundation and RISC-V.

We are resuming our quarterly meetup for the London open source community, focusing on RISC-V, hosted by the BCS Open Source Specialist Group and the UK Open Source Hardware User Group.  These meetings provide an opportunity to share the latest ideas around open source in the RISC-V ecosystem, combined with plenty of time for networking.

This time it will be a virtual meetup, and we’ll be livestreaming using BigBlueButton to provide a rich online experience for participants. As always the talks will be recorded for later upload to YouTube. When you register you’ll also get a link to a GoToWebinar session, which we will use as fallback if there is a problem with BigBlueButton, since we are still learning the technology.

Please register using the link above. For any with connection issues, we’ll also tweet the link on @BCSOSSG just before the meeting starts.

Porting Rust to 64-bit RISC-V GNU+Linux

Tom Eccles

This year several GNU+Linux distributions have released stable 64-bit RISC-V ports; which lead users and package maintainers to expect access to the Rust toolchain on RISC-V. I spent some time getting Rust’s 64-bit RISC-V target to the point that the project felt comfortable publishing official RISC-V builds. This talk explains how to port Rust to a new target and talks through some bugs fixed along the way.

Tom is interested in free software, cryptography and embedded systems. In 2017 he published a paper through MDPI. The paper suggests and evaluates the performance of a privacy preserving smart metering protocol. In 2018 Tom graduated with a masters degree in electronic engineering from the University of Southampton and started work as a software engineer at Codethink. At Codethink Tom helps clients align their embedded GNU+Linux systems more closely with upstream free software projects. Recently, Codethink sponsored Tom to improve support for RISC-V in the Rust ecosystem.

A Plan 9 C Compiler for RV32GC and RV64GC

The Plan 9 C compiler originated at Bell Labs alongside the Plan 9 and Inferno operating systems. It was part of the initial development toolchain for Go (before that language became self-compiling), and is a useful stand alone tool for building embedded software. A new RISC-V version of the Plan 9 C compiler, assembler and linker, targeting RV32IM cores such as PicoRV32, was announced by the author at ORCONF in 2018. The toolchain has now been expanded with floating point, compressed, and 64-bit instruction capability.

See Richard’s slides here: A Plan 9 C Compiler for RISC-V RV32GC and RV64GC

Richard Miller is a consulting engineer working in the borderland between software and hardware, on operating systems, programming language implementation, and digital logic design. His first C programming project was in 1977, adapting Dennis Ritchie’s original 16-bit PDP-11 C compiler to generate code for the 32-bit Interdata 7/32.

Porting the GNU CORE-V Toolchain

Mary Bennett
Pietra F T Madio, @7pietraferreira
Jessica Mills

Over recent years, RISC-V has taken off in both academia and industry. One RISC-V variant, CORE-V, developed by the Open Hardware Group, adds extensions which can improve performance and reduce code size. As part of this effort, the Open Hardware group have decided to build a robust set of GNU tools targeting CORE-V.

In the first part of this presentation, we will discuss adding support for hardware loop instructions to GNU binutils. This has involved making changes to the GNU assembler, gas, and the GNU linker, ld. We will explain in technical detail how we ported this custom extension to binutils as well how we tested the resulting CORE-V assembler and linker.

The second part of this presnetation will focus on adding hardware loops to GCC in three places; as built-in (intrinsic) funcions, as code-generation patterns for the compiler and within target specific optimization. We shall give special attention to memcpy, the function to copy blocks of memory, and which GCC uses every time a struct is assigned or returned as a result.

To encourage engagement with this project we have provided pre-built binaries, source code, scripts and test results for the comunity.  Additionally, patches are welcome as pull requests against the Open Hardware Group repositories for corev-binutils-gdb and corev-gcc on GitHub.

Mary Bennett is a tool chain engineer at Embecosm, developers of open source compilers, operating systems, models and AI.  She graduated from the University of Surrey with a degree in EEE and a love of Jui Jitsu and climbing.  Mary is best know for her work as Chair of the RISC-V Academia and Training group from 2018 to early 2020. She was winner of the UK Electronic Skills Foundation Scholar of the Year 2019.  Mary is a key engineer in the RISC-V CGEN project and CORE-V Binutils-GDB and GCC projects, and can be found on YouTube speaking on these subjects at numerous conferences over the past three years.

Pietra F. T. Madio moved to the UK from Brazil and has been working as a software engineer for Embecosm since November 2018. Pietra was previously undertaking research and implementation of neural networks using Keras and TensorFlow. She has also written a series of blog posts on implementing face recognition on the Google Coral development board. She currently is a key engineer at the CORE-V Binutils-GDB and GCC project, being the project manager for Binutils-GDB.  Pietra previously presented at the BCS as part of the 2019 Women in Open Source meeting and also spoke at the OSD Forum 2020 about her work on the Core-V Binutils-GDB project.

Jessica Mills is a Software Tool Chain Engineer at Embecosm, developers of open source compilers, operating systems, models and AI. She graduated from the University of Leeds with a masters degree in Electronics and Computer Engineering.  Jessica is a key engineer in both the CORE-V Binutils-GDB and GCC projects, being the project manager for GCC. She has previously presented this work at the OSD Forum 2020.

Join the session on BigBlueButton: https://test.vi4io.org/b/jul-uhk-iht-bvf

This is out annual lightning talk meeting, where members have the opportunity to speak for 10 minutes on their favourite topic.  The meeting will start with the AGM, which all are welcome to attend.

Please register using the link above for a free ticket.

In a first for the BCS, we shall be livestreaming using the open source platform BigBlueButton. We hope this will prove a much richer online experience, particularly for those joining from non-Windows platforms. We shall have a GoToMeeting link available as backup in case of teething problems.  We shall later be posting the videos on our YouTube channel for those who are unable to make it.

AGM

Everyone is welcome to attend, but only BCS members may vote. We will have the brief reports on the past year’s activities and then elect a new committee. Note: non-BCS members may stand for all committee posts except Chair, Treasurer and Membership secretary. So far we have the following nominations, but more are encouraged.

• Chair: Jeremy Bennett^†
• Treasurer: Richard Miller^†
• Membership secretary/Advocacy and outreach: Julian Kunkel^†
• Inclusion officer: Cornelia Boldyreff^†
• Web supremo: Simon Worthington^†
• Events sub-committee: Andy Bennett^†, Sevan Janyan^†
• Young Professional/Student representative: Daniel Broomhead
• Committee members:  Mary Bennett

^† Existing committee member standing for re-election

We depend on an active committee to put on all our events and drive our advocacy and outreach work. Please consider putting yourself forward.

Adding an instruction to the GNU assembler

Mary Bennett
Pietra F T Madio, @7pietraferreira
Jessica Mills

Over the past couple of years, RISC-V has taken off in both academia and industry. One RISC-V variant, CORE-V, adds extensions which can greatly improve performance and reduce code size. The speakers are leading the project to develop a full GNU tool chain supporting these instruction extensions.

In this lightning talk, they will look at just one part of this project. How to add a new assembly code instruction to the GNU assembler. They’ll use CORE-V hardware loop as the example for this. You’ll learn which files to edit, how to build the new assembler and most importantly how to test it.

A fuller version of this talk will be given at the London RISC-V Meetup (also hosted by BCS Open Source SG) on Monday 19 October, which will look a the complete tool chain. More information can be found in the Open Hardware Group repositories for corev-binutils-gdb and corev-gcc on GitHub.

Mary Bennett is a tool chain engineer at Embecosm, developers of open source compilers, operating systems, models and AI.  She graduated from the University of Surrey with a degree in EEE and a love of Jui Jitsu and climbing.  Mary is best know for her work as Chair of the RISC-V Academia and Training group from 2018 to early 2020. She was winner of the UK Electronic Skills Foundation Scholar of the Year 2019.  Mary is a key engineer in the RISC-V CGEN project and CORE-V Binutils-GDB and GCC projects, and can be found on YouTube speaking on these subjects at numerous conferences over the past three years.

Pietra F. T. Madio moved to the UK from Brazil and has been working as a software engineer for Embecosm since November 2018. Pietra was previously undertaking research and implementation of neural networks using Keras and TensorFlow. She has also written a series of blog posts on implementing face recognition on the Google Coral development board. She currently is a key engineer at the CORE-V Binutils-GDB and GCC project, being the project manager for Binutils-GDB.  Pietra previously presented at the BCS as part of the 2019 Women in Open Source meeting and also spoke at the OSD Forum 2020 about her work on the Core-V Binutils-GDB project.

Jessica Mills is a Software Tool Chain Engineer at Embecosm, developers of open source compilers, operating systems, models and AI. She graduated from the University of Leeds with a masters degree in Electronics and Computer Engineering.  Jessica is a key engineer in both the CORE-V Binutils-GDB and GCC projects, being the project manager for GCC. She has previously presented this work at the OSD Forum 2020.

XO and Sugar on a stick

Professor Cornelia Boldyreff

Cornelia Boldyreff lives in Greenwich and is a part-time Professor at the University of Greenwich in the School of Computing and Mathematical Sciences. She was previously the Associate Dean (Research and Enterprise) at the School of Architecture, Computing and Engineering at the University of East London from 2009 – February 2013.

Cornelia gained her PhD in Software Engineering from the University of Durham where she worked from 1992; she was a Reader in the Computer Science Department when she left.
In 2004 she moved to the University of Lincoln to become the first Professor of Software Engineering at the university, where she co-founded and directed the Centre for Research in Open Source Software.

She has over 25 years’ experience in software engineering research and has published extensively on her research in the field. She is a Fellow of the British Computer Society, and a founding committee member of the BCSWomen Specialist Group, a committee member of the BCS e-Learning Specialist Group, and since 2013 she has chaired the BCS Open Source Specialist Group. She has been actively campaigning for more women in STEM throughout her career.  Together with Miriam Joy Morris and Dr Yasmine Arafa, she founded the start-up, ebartex Ltd, and together they are developing a new digital bartering currency, ebarts.

The HPC Certification Forum: An Open and Free Certification for HPC – A Good Model for OSS?

Dr Julian Kunkel

The diversification of High-Performance Computing (HPC) practitioners challenges the traditional training approaches, which are not able to satisfy the specific needs of users, often coming from non-traditionally HPC disciplines and only interested in learning a particular set of skills. HPC practitioners are expected to have various HPC skills, however, those “skills” have not been well-defined until now. The ability to speak a common language – among HPC educators and users – is critical.

The HPCCF strives to identify this set of competencies for HPC users. It is our aim to thereby facilitate course offers across HPC sites and to provide a certification procedure for HPC practitioners. Ultimately, we aim for the certificates to be recognized and respected by the HPC community and industry. In the competence standard, we already have many open-source skills as open source fuels HPC sytems. We believe this model is scalable and could be applied more in the open-source environment.

Dr Kunkel is a Lecturer in the Department of Computer Science at the University of Reading. He manages several research projects revolving around high-performance computing (HPC) and particularly high-performance storage. He became interested in the topic of HPC storage in 2003, during his studies of computer science.  Julian serves as Membership Secretary and Advocacy and Outreach officer for the BCS Open Source SG.

An Insight into Open Source from a Student’s Perspective.

Daniel Broomhead

The introduction of open source to young people has always been a major downfall for the progression of open source, with young people wanting to get involved with software like Linux but never knowing where to start and how to get involved. Daniel Discusses the experience he had with open source and where he thinks the future need to be heading in order to incorporate the younger generations, reflecting on some of the complications of the past and some reasons why the younger generations struggle to get involved as early as they could have.

Daniel Broomhead is a final year Computer Science Student at the university of Reading. He is the current president of the University’s R. U. Hacking? Society which is a computer Science society with a focus around integrating with a tech and professional environment, including hosting, and running many events like Hackathons.

Daniel is curious about all different areas of computer science and always keen to learn more, however his current passion lies in the cyber security side of things, particularly offensive security, and while he is lacking the current experience and expertise, this is his main focus for the future, and his topic chosen for his final year project.

PCI bus hacking from home – how hard can it be?

Maxim Blinov

Digital protocols are the bread and butter of virtually every electronic engineer today. UART, SPI, I2C, USB, PCIe, the list goes on. But it’s very rarely that we get the opportunity to actually implement one such protocol ourselves.

This project was an excercise to take the role of implementing a protocol, given all the usual limited constraints of a hobbyist operating from home: Create a very simple (but functional) conventional (33MHz) PCI endpoint, visible from Linux, and capable of transferring data from internal FPGA LUTs to Linux Userspace.

The project touched on aspects of FPGA design, design verification, physical debugging approaches, and just a dash (and I really mean just a dash!) of linux kernel modification.

Maxim Blinov is a toolchain engineer working at Embecosm, supporting and customizing GCC toolchains for client-specific architectures and architecture extensions. His main open source work has been benchmarking and customizing the upcoming RISC-V bitmanip extension.

In his free time he dabbles in MCUs, FPGAs, softcore CPUs, and Windows driver development.

A Minimalist Network on Chip on an FPGA

Richard Miller

This is an ongoing project to implement an FPGA NoC (network on chip) which is “as simple as possible but no simpler”. Originally intended as a lightweight alternative to ethernet for linking a cluster of Raspberry Pi Zeroes, it can also serve as the internal communication fabric for a multicore SoC (system on chip).

Richard Miller is a consulting engineer specialising in systems software (operating systems and programming language implementation) and digital logic design. He serves as Treasurer of the BCS Open Source SG.

12 things everyone needs to know about data

Simon Worthington, @51M0NW

In this talk, Simon will give a “Papers We Love”–style walkthrough of a favourite scientific paper from the University of Southampton and the Open Data Institute. Much open data publishing is focused on the act of getting data out of the door safely and correctly, and not many people focus on actually helping others to find and evaluate their datasets. This paper examines the way people search for open data and suggests a 12-point checklist for what potential users need to know that everyone can implement.

Simon is a founder of Register Dynamics, a data consultancy on a mission to make data more useful for everyone, and the creators of Registers.app. As a technologist with years of experience applying cutting-edge data technology to meet real user needs, Simon gets that data is hard. Tell him your data problems on Twitter @RegDyn!

Why the J-core open processor is cool

The patents on the bestselling processor of the 1990’s finally expired, and it’s been cloned as open hardware. J-core scales from running SMP Linux down to fitting in a tiny 5000 cell ICE-40 FPGA, and we just uploaded a new open source GPS receiver built around it to github.

Rob Landley maintains the J-core Board Support Package, used to maintain busybox, maintains toybox (the command line utilities used by Android), and used to be the linux kernel documentation maintainer.

Yosys and nextpnr – open source FPGA update

Find out about the newest developments in Yosys and nextpnr, including experimental Xilinx support, synthesis improvements and new place and route algorithms! This talk will also discuss some of the future work
that is planned, with an ambitious target to support 1-million-LUT scale designs on UltraScale+ devices by the end of the year.

David Shah is a self-employed developer working on nextpnr, the open source FPGA place-and-route tool. His previous work also includes Project Trellis, open source bitstream documentation for the Lattice ECP5 FPGAs.

Repurposing Obsolete FPGA-based Products as Development Kits

Commercial FPGA development boards can be relatively cheap or they can have a lot of logic resources and features, but never at the same time.
When commercial products with large FPGAs become obsolete, they can often be found dirt cheap on eBay. With a little bit of effort, some of these products can be reverse engineered and repurposed as generic FPGA development kits. This talk will show some examples, and discuss techniques that can be used to reverse engineer these kind of products.

Tom Verbeure is a hardware engineer at Nvidia where he works on monitor technology. Before Nvidia, he worked on communication ASICs at Barco, Alcatel and Conexant. When he’s not mountain biking in one of the many parks around the SF Bay Area, you can probably find him in his garage, looking through a microscope trying to trace tiny wires on an old PCB, or burning up an LED panel in a misguided attempt to control LED cube with a Cisco WAN modem.