Archives: Events

Setting Up Your Own OpenStreetMap API

This session will detail how you can use data from the open, crowd-sourced mapping project OpenStreetMap to populate your own database and write your own simple API. Attendees are assumed to have some web development experience.

This is a joint event with the BCS Hampshire Branch, BCS Open Source SG and Solent University.

Free and open to both BCS and Non-BCS Members, but please booking essential as limited numbers via

OpenStreetMap (OSM) is an international, crowd-sourced project to map the entire world. Volunteers contribute to the map by walking, cycling or driving along paths and roads with GPS devices, or tracing outlines of buildings and landscape features from aerial imagery. The really powerful thing, however, about OSM is the data itself – which is free and open and available for use by third-party applications. This practical session will provide a brief introduction to OSM and demonstrate how you can set up your own database with OSM data and write a simple web API to query the database.

Attendees are expected to have some server-side web development experience and should have basic command-line skills.

Dr Nick WhiteleggDr Nick Whitelegg is a senior lecturer in Computing (Web Development) at Southampton Solent University and teaches on a range of undergraduate software development courses including Android and web development. He has contributed software and data to the OpenStreetMap mapping project and has developed an open source mapping site and associated tools for walkers.

Modern Languages

During this evening, held jointly with OSHUG, we look at the latest in open source programming languages. Three talks from three highly respected speakers

Note. We are in the new BCS London offices at 25 Copthall Ave  EC2R 7BP.

Eventbrite - Open Source SG

Tea/coffee will be served from 6:00pm, with the talks from 6:30pm. Each talk will last around 30 to 45 minutes including any questions.

We shall be livestreaming and recording the talks for later posting on YouTube via GoToWebinar. Please register at:

An introduction to Perl6

Simon Proctor

An introduction to the newest version of Perl with an emphasis on some neat features.

With 17 years as a professional web developer (in a range of languages) and over 30 years of doing it for fun Simon Proctor has just about started to understand what he’s doing. He’s on occasion been known to take things seriously.

Julia – A fresh approach to numerical computing

Avik Sengupta

In this talk, Avik will demonstrate how Julia combines dynamic, high level source with a high performance runtime code. He will show what makes Julia unique among programming languages, and how it enables high quality numeric computing libraries. He will survey the machine learning / deep learning ecosystem in Julia, and talk about how that can be extended to new kinds of modelling using differentiable programming. The talk will begin as an introduction to the language, and finish by showing how it opens up new paradigms of computing.

Julia is the fastest high performance open source computing language for data, analytics, algorithmic trading, machine learning, artificial intelligence, and many other fields. Julia solves the two language problem by combining the ease of use of Python and R with the speed of C++.

Avik Sengupta is the head of product development and software engineering at Julia Computing, contributor to open source Julia and maintainer of several Julia packages. Avik is the author of Julia High Performance, co-founder of two artificial intelligence start-ups in the financial services sector and creator of large complex trading systems for the world’s leading investment banks. Prior to Julia Computing, Avik was co-founder and CTO at AlgoCircle and at Itellix, director at Lab49 and head of algorithmic solutions at Decimal Point Analytics. Avik earned his MS in Computational Finance at Carnegie Mellon and MBA Finance at the Indian Institute of Management in Bangalore.

Evolving Languages: 5 Steps to Go

Charles Forsyth

Go is the latest of a sequence of closely related concurrent programming languages: Squeak, Newsqueak, Alef, Limbo and Go. Each one strictly followed its predecessor, they occupy a similar space (CSP-inspired concurrent languages), and all but Squeak have a vaguely similar syntax, perhaps suggesting gradual refinement and incremental evolution. I take a closer look, revealing their significant differences, especially in in type systems and run-time environments, reflecting the effect of different design choices to satisfy the requirements of a larger, surrounding system.

Dr Charles Forsyth is a founder and Technical Director of Vita Nuova, which specialises in systems software and distributed systems.

He is interested in compilers, operating systems, networking (protocols and services), security, and distributed systems and algorithms. He specialises in the design and implementation of systems software, from low-level drivers through compilers to whole operating systems. He has published papers on operating systems, Ada compilation, worst-case execution analysers for safety-critical applications, “resources as files”, and the development of computational grids.

London Open Source Meetup for RISC-V

This is our quarterly meetup for the London open source community, focusing on RISC-V, hosted by the BCS Open Source Specialist Group and the UK Open Source Hardware User Group.  These meetings provide an opportunity to share the latest ideas around open source in the RISC-V ecosystem, combined with plenty of time for networking. Please discuss, give feedback and suggest future topics on the London Open Source Meetup group event page.

Note. This meeting is at the new BCS London offices, 25 Copthall Ave, EC2R 7BP.

At this evening meeting we have three talks on the CHIPS alliance, a comparative analysis of the RISC-V ecosystem and a look at RISC-V in education.  The talks will be live streamed and available on afterwards on the BCS Open Source Specialist Group YouTube channel.

Eventbrite - Open Source SG - London Open Source Meetup for RISC-V

Tea/coffee will be served from 6:00pm, with talks starting at 6:30pm. Each talk will last 20-30 minutes and include plenty of time for questions, after which there will be opportunity to network both in the BCS  and later at the Globe pub round the corner.

We shall be livestreaming and recording the talks for later posting on YouTube via GoToWebinar.  Please register at:

After registering, you will receive a confirmation email containing information about joining the webinar.

Chips Alliance Project

Dr Zvonimir Z. Bandić, @zbandic

We have recently launched a CHIPS Alliance project: CHIPS (Common Hardware for Interfaces, Processors and Systems) Alliance harnesses the energy of open source collaboration to accelerate hardware development. The organization was created to host and curate high-quality, open source hardware design relevant to the design of silicon devices. By creating a neutral and collaborative environment, CHIPS Alliance intends to share resources to lower the cost of development and accelerate the creation of more efficient and innovative chip designs – covering the span from small IoT devices to large datacenter silicon solutions.

As an independent entity, companies and individuals can work together and contribute resources to help make open source chips, complex IP blocks and system-on-a-chip (SoC) design more accessible to the market.

We will describe our initial projects, which are SweRV core – high performance, 9-stage, dual issue, 32 bit superscalar RISC-V core, associated instruction set simulator, Universal Verification Methodology (UVM)-Based Stream Generator Environment for RISC-V Cores, that provides configurable, highly stressful instruction sequences that can verify architectural and micro-architectural corner-cases of designs, OmniXtend cache-coherence over ethernet interconnect protocol, FuseSOC package manager, Verilator RTL simulator, cocotb design verification and several others.

Zvonimir Z. Bandić is the Research Staff Member and Senior Director of Next Generation Platform Technologies Department in a Western Digital Corporation in San Jose, California. He received his BS in electrical engineering in 1994 from the University of Belgrade, Yugoslavia, and his MS (1995) and PhD (1999) in applied physics from Caltech, Pasadena, in the field of novel electronic devices based on wide bandgap semiconductors. He is currently focusing on emerging Non-Volatile Memories (PCM, ReRAM, MRAM) applications for data center distributed computing, including RISC-V based CPU technologies , in-memory compute, RDMA networking, and machine learning hardware acceleration. He has been awarded over 50 patents in the fields of solid state electronics, solid state disk controller technology, security architecture and storage systems and has published over 50 peer-reviewed papers. Zvonimir is Chairman of CHIPS Alliance, Chair of OpenCAPI org, and Board of Directors member of RISC-V standards organization.

Open Source Hardware meets Open Source Software

George Grey, @gcgrey

The RISC-V architecture spans 32 bit micro-controllers to 128 bit advanced multi-core SoCs. The free and open ISA encourages and accelerates innovation and differentiation in hardware design. However, a large part of the cost of ISA support is the delivery and evolution of a software ecosystem. Software fragmentation has historically been a significant industry challenge. This is particularly true in the IoT, embedded and Edge device markets, where there is an unlimited range of different hardware configurations and use cases. This talk will discuss different paths to development of the RISC-V software ecosystem in a world where billions of devices are now being connected, requiring universal standards for IoT to Cloud end to end applications, including security and over the air updates for every device.

George is CEO of He was previously CEO of Linaro Ltd, leading open source software collaboration in the Arm ecosystem for the last 8 years. Prior to joining Linaro, George led software and hardware technology companies for over 25 years, gaining wide ranging expertise in business strategy, product development, sales and marketing. He has built a reputation for leading and growing technology companies, and brings extensive experience in creating innovative products and solutions for global markets to George holds a degree in Electrical Sciences from Cambridge University and currently resides in Cambridge, UK.

Ripes: Teaching computer architecture through visualization

Morten Borup Petersen

The presentation will provide an overview of typical topics covered in an introductory computer architecture course to motivate the use of visual tools in teaching.

We will then take a look at Ripes, an application for visually simulating a 5-stage pipeline implementing the RISC-V instruction set.

Besides simulation, the main purpose of Ripes is to visualize the implications of control- and data hazards on the processor microarchitecture.

Find the source code for Ripes at:

Morten is at the EPFL, Switzerland, specializing in computer engineering and embedded systems. He is the author of Ripes, an open-source application for teaching computer architecture through
visualization, using the RISC-V instruction set.  He has previously interned at Arm Cambridge as well as published research on computer architecture at the NorCAS and ARCS conferences.

Lightning talks and AGM

This evening event starts with the BCS Open Source Specialist Group AGM, and is then followed by our lightning talk evening. We introduced this last year, and the event, with talks ranging from open source water jet surfing to open source sous vide cooking was very popular, so we are repeating this year.  The event is not yet full, so if you would like 10 minutes to talk about your pet project, please ask!

Note. We are in the new BCS London offices at 25 Copthall Ave  EC2R 7BP.

Eventbrite - Open Source SG - London Open Source Meetup for RISC-V

Tea/coffee will be served from 6:00pm, with the AGM starting at 6:30pm and lightning talks from 6:50pm. Each talk will last no more than 10 minutes including any questions.

We shall be livestreaming and recording the talks for later posting on YouTube via GoToWebinar.  Please register at:

After registering, you will receive a confirmation email containing information about joining the webinar.


Everyone is welcome to attend, but only BCS members may vote. We will have the brief reports on the past year’s activities and then elect a new committee. Note: non-BCS members may stand for all committee posts except Chair, Treasurer and Membership secretary. So far we have the following nominations, but more are encouraged.

  • Chair: Jeremy Bennett
  • Treasurer: Richard Miller
  • Membership secretary: Julian Kunkel
  • Secretary: Cornelia Boldyref
  • Web supremo: Simon Worthington
  • Events sub-committee: Andy Bennett, Sevan Janyan
  • Advocacy and outreach: This is planned to be combined with the membership secretary role.
  • Young Professional/Student representative: No nominations
  • Committee members: No nominations

We depend on an active committee to put on all our events and drive our advocacy and outreach work. Please consider putting yourself forward.

Embedded Facial Recognition on Edge TPU

Pietra F T Madio

Google recently released a new development board for edge computation on embedded devices. For my project I implemented a facial recognition system on their device using Tensorflow. In this talk I’m presenting some of the challenges I faced, the limitations of the board and how we were able to overcome them.

Pietra is a college student at Brockenhurst College and an AI Research Engineer for Embecosm.

The Open Source Satellite Programme

Paul Madle

Over the last 25 years, the UK has brought positive disruptions to the space industry. The University of Surrey innovated small spacecraft: leveraging Commercial-Off-The-Shelf components that could compete with larger more traditionally designed spacecraft. In the last 7 years, Scottish CubeSats (very small satellites) have grown from academic projects into commercially viable products performing earth observation and other applications. Both of these innovations have brought down costs and made space more accessible to greater numbers of people. KIPSE Space Systems aspires to be a catalyst for the next step-change to the industry by collaboratively designing a new, capable spacecraft platform that is open source, all design being freely accessible through the internet.

Paul Madle has 20 years’ experience as a systems/software engineer within the Aerospace, Finance & Web sectors. His code runs on the most critical on board systems for some of the UK’s most significant spacecraft projects. He is very keen to share his knowledge with the next generation of engineers and runs code clubs that have successfully transitioned young people with few qualifications into capable software engineers who now work within the industry.

It’s Open Source, not gratis binaries

Sevan Janiyan, @sevonroad

Sevan is the founder of Venture37, which offers consultancy around the fundemental building blocks of IT systems such as DNS, email, HTTP, firewalls or routing running on UNIX & alike systems. He is an active supporter OpenBSD, NetBSD, FreeBSD and CoovaChilli.

Intel 8080 microprocessor on an FPGA

Maxim Blinov

The Intel 8080 microprocessor was one of the first widely available general-purpose microprocessors. Given its historic significance and relatively straightforward ISA, I implemented a binary compatible softcore variant using VHDL, targeting the Artix7 100T FPGA. Accompanying the softcore CPU is a PS2 keyboard controller, VGA text buffer, and 7-segment display driver. These components are accessible from the 8080 through memory mapping, which is realized by a central memory access controller. Hence, software can read scan codes from the keyboard controller, and writes text to the VGA terminal, which is enough for a simplistic but nonetheless curious software platform.

The hardware description source can be found at

Maxim is currently working at Embecosm, helping to develop and support open-source GCC-based toolchains. His last major work was to benchmark and debug the experimental GCC support for the draft RISC-V bitmanip ISA extension, using both software simulation and verilated IP cores.

Maxim is also interested in FPGA hardware design, and embedded software development.

Making with BlackEdge

Al Wood, @folknology

Using the BlackEdge standard to build the new BlackIceMx, eating our own dog food.

Al  is an engineer of opensource hardware & software, practitioner of robotics, electronics & 3D Printers and tutor of ML, FPGA & Verilog. Bit wrangler in C, Erlang & Python.

Title to be announced

Andy Bennett, @databasescaling

Andy Bennett is founder of Register Dynamics and inhabits the void between hardware, software and users. He serves on the BCS Open Source SG committee as one of our event coordinators.

More talks to follow…

Open Source Hardware Camp 2019

Open Source Hardware Camp 2019 will take place place in the Pennine town of Hebden Bridge, where it will return to be hosted for the sixth year as part of the Wuthering Bytes technology festival.

Hebden Bridge is approximately 1 hour by rail from Leeds and Manchester. Budget accommodation is available at the Hebden Bridge Hostel which adjoins the venue, with private rooms available and discounts for group bookings. Details of other local accommodation can be found at

There will be a social event on the Saturday evening from 8PM.

Any questions should be directed to the Discussion List.


  • There are separate tickets for Saturday and Sunday.
  • A light lunch and refreshments will be provided each day.
  • Delegates will receive an RC2014 Micro upon registration on the Saturday!
  • Please aim to arrive between 09:00 and 09:15 on the Saturday as the event will start at 09:20 prompt.

Saturday Talks

Customising a RISC-V Core

This talk walks through the RISC-V ISA and the microarchitecture of an open-source RISC-V core, to provide an understanding of how new instructions can be added to the hardware.

RISC-V is an open Instruction Set Architecture (ISA) that can be implemented freely. The ISA is modular, providing a base set of integer instructions alongside standard extensions for multiplication, floating point, atomic operations, and many other categories. In addition to standard extensions, the ISA reserves space for user-defined extensions, providing the flexibility to add custom instructions that fulfil any purpose.

There are many open-source implementations of RISC-V cores – in this talk we will look at a small core written in SystemVerilog that is simple enough to be understood by those relatively new digital logic design. We will walk through the different components of the core and how they fit together to build a picture of how instructions are decoded and executed, and go through an example of the changes to each component needed to support a custom instruction.

Dr Graham Markall is a software toolchain engineer at Embecosm, which provides open source toolchain services. Most of his work focuses on GNU toolchains (GCC, Binutils, GDB, etc.) and the use of cycle-accurate simulation for pre-silicon toolchain development and testing. His current projects focus on the development of customised toolchains for various RISC-V systems, ranging from small, deeply-embedded applications up to high-performance multicore systems.

Building A Network on a Chip for a Raspberry Pi Zero Cluster

A Raspberry Pi cluster is a popular platform for experimentation and learning about parallel computing. The tiny Raspberry Pi Zero has no built-in ethernet capability, so a Pi Zero cluster needs an alternative way to connect the CPUs. By implementing a specialised local network on an FPGA chip, linked to a serial or SPI port on each CPU, we can avoid the need for bulky ethernet cables and switches, and build a very compact cluster with low cost and low power consumption.

As a member of Oxford University’s Programming Research Group in the 1980s, Richard Miller wrote software for parallel computing systems from the transputer to the Cray T3D. More recently as a freelance software engineer, he ported the Plan 9 operating system to the Raspberry Pi. His current focus is on FPGA circuit design.

From humble beginnings to manufacturing the HILTOP open source test and measurement platform and the problems along the way!

The story of how three entrepreneurs with a vision and willingness to succeed have carved out an open source test and measurement business and the details behind the hardware and software problems they had with early prototypes and product integration.

Tim Telford is a hardware engineer with diverse skill set and highly motivated self starter. Passionate about design detail and experienced in high reliability solutions for the Aerospace, Defence, Telecoms and Nuclear industries.

Development of test equipment and measurement systems for Rolls-Royce Aerospace. Systems and Electronic engineering experience within the nuclear industry. Design of commercial test equipment and high integrity, high value projects.

Analogue and Digital board level design, Schematics, PCB, FPGA development, DFM, DFT, Simulation, systems design and integration/testing. Requirements management, FMEA, WCA & PSA analysis techniques.

Joe Burmeister spent nearly 12 years in the console and PC game industry. He worked in a number of areas from graphics and animation engine to art and animation tools, finally file systems and databases.

Joe comes from a multiple platform background, partly as consoles used to not be PCs, but also having grown up on RISC OS (Acorn’s desktop ARM OS), before moving to Windows for work then Linux for fun and finally work. For the past five years Joe has done work on GNU/Linux, often on ARM.

Having started out bedroom programming, Joe is a strong believer that everyone should have the option of source code and learning how things work.

Linux on Open Source Hardware and Libre Silicon

This talk will explore Open Source Hardware projects relevant to Linux, including boards like BeagleBone, Olimex OLinuXino, Giant board and more. Looking at the benefits and challenges of designing Open Source Hardware for a Linux system, along with’s experience of working with community, manufacturers, and distributors to create an Open Source Hardware platform. In closing also looking at the future, Libre Silicon like RISC-V designs, and where this might take Linux.

Drew Fustini is an Open Source Hardware designer at OSH Park, board member of the BeagleBoard Foundation, maintainer of the Adafruit BeagleBone Python library, and Open Source Hardware Association vice president.

Exploring the Gigatron TTL Computer

The Gigatron TTL computer is an open source computer constructed almost entirely from TTL logic – without the need for a microprocessor. The unique design combines 36 standard 74HCTxx TTL devices with ROM and RAM chips to make a platform capable of colour VGA video and sound. The machine can host 1980’s style games and can be programmed in interactive Tiny BASIC.

In the last year, Ken has explored the architecture of this machine and achieves some performance gains by overclocking the cpu by over 200%. This has yielded a platform that is rated at about 2 to 3 times the performance of the classic 1980’s machines, such as the C64, Spectrum etc.

Working with an unfamiliar architecture has meant creating some programming tools and also simulating the machine behaviour on an ARM processor.

Ken discusses the progress to date – and poses the question, “What would computers be like had the microprocessor not appeared when it did?”

Ken Boak began programming computers in 1979 at school, and has continued to do so – somewhat infrequently over the last 40 years. The Gigatron rekindles old memories of TTL logic and working with resource limited computing. It illustrates just how much can be done with such a minimal machine.

Gearing up for Volume Manufacturing: Tales from China

The journey of a design from engineering sign-off all the way to customer shipment takes many months of hard work and the smallest of hiccups could translate to severe delays. With many actors involved, how does it all work? What is involved in designing and shipping a consumer product with high volume manufacturing in mind?

This talk will give the audience a behind the scenes look at what it takes to ship electronics products at scale, particularly focusing on the approach, dialogue and the processes required to run a successful manufacturing project.

Omer Kilic is an embedded systems engineer who works at the various intersections of hardware and software engineering practices, product development and manufacturing.

Saving Your Electronic Conference Badge From A Life On The Shelf

As the creator of an electronic conference badge, you want to create something memorable, a badge with Wow! factor which will be remembered fondly and remain in use for years afterwards. Unfortunately so many badges end up sitting in drawers gathering dust, never to see the light of day again. Firmware,hardware, or documentation haven’t been kind to the conference attendees, and though you’ve given them an amazing piece of hardware they just haven’t been able to get a handle on it and use it in their own projects.

This talk gives a few ideas about how that might be avoided, how an awesome badge can avoid being an ignominious piece of e-waste and become a valued piece of hardware used in projects for years afterwards.

Jenny List is an electronic engineer and technical writer who spent a long career in electronic publishing from CD-ROMs to dictionaries before breaking out and forming her own hardware business, and writing about hardware as a contributing editor for

What’s So Good About The Z80 CPU Anyway?

This talk will briefly cover the history of the Zilog Z80 CPU including early development, some predictable places where it turned up, as well as some more less expected uses. It will include a look at the architecture of the Z80 itself and then an overview of how to build a simple Z80 based computer and program it in BASIC. This will lead on to a description of the kit in your goodie bag and a plug for the workshop on the Sunday.

Spencer Owen like many kids in the 80s, loved his ZX Spectrum and other 8 bit computers. This set him up for a career in IT, and he worked as a server engineer and network engineer for many years. In 2013, in a bid to see if he really understood how computers worked at the lowest level, Spencer went back to his roots built a simple Z80 based machine on a breadboard. This was to mature in to the RC2014, which Spencer started selling in his spare time in 2015. Within a few months it was clear that the RC2014 was taking up more time than he had spare, so he quit network job and started a retro computer kit company. Spencer is now the largest supplier of Z80 computers worldwide.

Next Generation Open Source FPGAs

After the success of Icestorm and the growth of the open source FPGA ecosystem, work started on the next generation of open source FPGA toolchains in 2018. This includes the next-generation place-and-route tool nextpnr, designed to support a wide range of FPGA architectures as well as producing higher quality results with less runtime. Combined with Project Trellis which provides bitstream documentation for the Lattice ECP5 FPGAs, a wide range of advanced projects such as Linux-capable RISC-V SoCs with fast memory, Ethernet and video interfaces are possible with an end-to-end open source flow.

This talk will introduce these new tools and their capabilities, as well as discussing what lies ahead for open source FPGA tools, and how you can get involved in this exciting new open world!

David Shah is a engineer at Symbiotic EDA and a Electronic and Information Engineering student at Imperial College London. He entered the world of open source FPGAs by extending Project Icestorm, the iCE40 bitstream documentation project, to include the newer iCE40 UltraPlus FPGAs. As well developing Project Trellis, he has been involved in the development of a new open source FPGA place-and-route tool, nextpnr.

Heterogeneous design for embedded development

Developing embedded solutions for today’s challenging applications be them IoT, consumer, automation or robotics requires a heterogeneous technology approach involving hardware, FPGA, µC Firmware, and software combined at multiple levels. Concepts such as Machine Vision/Learning, Artificial Intelligence coupled with traditional embedded hardware and software stacks require hybrid approaches to design and implementation. I take a look at typical hardware being used and platform sweet spots I have been identified. I also take a look at some emerging tools and approaches for tackling these heterogeneous projects.

Alan Wood has been working with parallel distributed programming for several decades. His recent work includes smart grids, 3D printers, robotics, automation and biotec diagnostics. His current research is focused on machine learning for embedded automation using FPGA and µC. He is a long term advocate of open source communities, a moderator (aka Folknology) for xCORE, the co-founder of myStorm open hardware FPGA community, as well as a co-founder of Surrey and Hampshire Makerspace.

EMC Design for Open Source Hardware

Many Open Source electronics designs start off as cool development tools and end up being integrated into commercial products due to their low barrier to entry and ease of development.

Now your hardware becomes subject to various Regulatory requirements, Electro-Magnetic Compatibility (EMC) amongst them. Whilst it might not be viable for an Open Source project to undergo full compliance testing, there are things that can be done to improve the EMC performance of your system.

In this talk, James gives an overview of common problems encountered during EMC testing of Open Source hardware and the fixes required to resolve them. We’ll also look at some key electromagnetic concepts (don’t worry, no scary maths) that will help you look at your designs in a new light.

James Pawson runs Unit 3 Compliance, a West Yorkshire EMC test lab and consultancy that offers practical advice and EMC problem solving for a wide range of electronics products.

The complex and simplistic elegance of the 1-wire protocol

The Dallas 1-wire protocol is a two-way communications bus that allows microcontrollers to talk to a number of peripherals using just a single wire. It promises high data rates, a range of peripheral types and very long wires all with the minimum of resource requirements and complexity. This talk will explore how it works, how to implement it and how to actually drive those busses made up of very long wires.

Andy Bennett trained as an Electronic & Electrical Engineer and has a background in consumer electronics, FPGAs, operating systems and device drivers. For the last 10 years he has been building companies around distributed database technology. He is currently Director of Register Dynamics who help companies and governments apply their data usefully, responsibly and ethically.

Andy is a Technologist that likes to inhabit the void between users, software and the hardware that it all runs on. His love of ceramic taps is well-documented.

Sunday Workshops

Customising a RISC-V Core – workshop

Starting from an Open-source RISC-V core, add a new instruction to it that you design! This workshop will walk through the process of getting started with simulating an open-source RISC-V core and making the necessary modifications to decode and execute a new instruction.

A processor that supports a new instruction is not much good if you can’t write any code for it, so the second part of the workshop will focus on adding support into the assembler for your new instruction, so that you can write a program using the instruction and see that it executes correctly (or does not, and helps you to work out the bugs in your implementation).

The tutorial materials will provide enough of the implementation and sufficient guidance to be able to work through with a little experience of Verilog and C++. For those new to Verilog, the materials from last year’s talk and workshop (“Introduction to cycle-accurate Verilog simulation” and “Open Source RISC-V core quickstart”) will be available to provide a more accessible starting point.

Participants should bring:

  • A laptop.

Run by: Graham Markall

A Crash Course in KiCAD

A KiCAD basics workshop that will be a crash course covering the main aspects of schematic capture, PCB layout and generating the manufacturing outputs and 3D models etc.

Participants should bring:

  • A laptop with KiCAD version 5 installed ready to go.

Run by: Tim Telford

Gigatron TTL Computer demo and hands-on

There will be a demo of the machine and an opportunity to do some retro-programming.

Run by: Ken Boak

SMD Soldering

In this workshop we will introduce common SMD soldering techniques, including stencils and solder paste usage in a hobbyist home-lab capacity. The format is a series of demonstrations followed by exercises. Participants will be provided with a kit of parts and will assemble their circuits taking turns on the equipment provided. There will be a mixture of hand soldering and hot plate/air reflow techniques covered and a variety of SMD packages including some fine pitch components will be used.

Participant requirements:

  • Some familiarity with soldering and electronics in general would be beneficial.

Run by: Omer Kilic

Assembling Your RC2014 Z80 Based Computer

This workshop will take participants through all the stages of assembling and getting started with the RC2014 kit. Some basic soldering experience is assumed and soldering irons and tools will be available for groups of up to 6 people at a time.

There will be a nominal charge of £5 per person.

Participants should bring:

  • A laptop.
  • An FTDI cable if they have one.

Heterogeneous embedded hardware example walk through

A walk through a practical heterogeneous application and its development, based around the combination of a microcontroller and an FPGA along with mixed tooling.

Run by: Alan Wood


Speed Meets Scale: Interactively Analysing and Visualising Billions of Rows with GPU-powered Analytics

Data analytics never seems to be fast enough, especially as data grows and the number of sources expand. The shift from legacy databases to in-memory databases helped, but the speed and scale of CPU-based solutions has not kept pace with the needs of data analysts, who want interactive querying, visualisation and decision-making with their data. This lagging user experience costs time and money for companies that are increasingly data rich but insight poor.

In this presentation, Akmal Chaudri will explain what is causing the shift to GPUs, and how they are fundamentally changing the analytics space. We will also show, using demonstrations, the use of GPUs for performing fast analytics at scale, including SQL queries, interactive data visualisation, and integration with typical data science and machine learning workflows.

The presentation will focus on open source technologies.

Speaker biography

Akmal Chaudhri is a Community Developer Advocate at OmniSci. His role is to help build the global OmniSci community and raise awareness through presentations and technical writing. He has over 25 years experience in IT and has previously held roles as a developer, consultant, product strategist, evangelist and technical trainer. He has worked for several blue-chip companies, such as Reuters and IBM, and also the Big Data startups Hortonworks (Hadoop) and DataStax (Cassandra NoSQL Database).

He has regularly presented at many international conferences and BCS SPA evening meetings and served on the program committees for a number of major conferences and workshops. He has published and presented widely and edited or co-edited 10 books. He holds a BSc (1st Class Hons.) in Computing and Information Systems, MSc in Business Systems Analysis and Design and a PhD in Computer Science.

He is a Member of the British Computer Society (MBCS) and a Chartered IT Professional (CITP).


18:00 – Sandwiches, refreshments and networking
18:30 – Main presentation – Akmal Chaudhri
20:00 –Further refreshments and networking

For overseas delegates who wish to attend the event please note that BCS does not issue invitation letters.

Remote participation

If you are unable to attend in person, the event will be live streamed on GoToWebinar. Please register for SPA-334 on Sep 4, 2019 6:00 PM BST at:

After registering, you will receive a confirmation email containing information about joining the webinar.  The event will also be recorded and made available shortly afterwards on the BCS Open Source SG YouTube channel.

This is a joint event with the SPA Specialist Group.

What’s New in Cryptography & Security

Over the last few years the security landscape has changed in several major ways. The Internet Of Things has made security and privacy a major problem for everyone. The move to HTTPS on almost every site and the attacks on TLS have raised awareness of security on the web, As a result, there has been a renewed focus on open source cryptography libraries, including new forks and projects. This meeting will take a look at the current state of security and cryptography and we’ll look at how open source is contributing to the solutions as well as the problems. This is a joint meeting with the Open Source Hardware Users Group (OSHUG).


Failures in Firmware, an analysis of common weaknesses in IOT devices

The advent of the Internet of Things has created an industry filled with incredible technologies, and incredible vulnerabilities. This talk aims to outline common weaknesses in these devices that can occur even if the developers are trying their best to make a device secure. This will include problems that can occur when implementing standard functionality, such as authentication, firmware updates, secure communication and protection of sensitive data.

This talk will cover the following topics, with demonstrations and recommendations:

  • The basics of cryptography, how it works, how it is implemented, and the different types of software which implement it. This will include an introduction to Open Source encryption libraries and the pitfalls that can occur when they are implemented incorrectly.
  • An introduction to Open Source libraries used for developing embedded software, including an assessment of example libraries for specific chipsets which contain known vulnerabilities.
  • Demonstration of weaknesses in firmware protection mechanisms, covering what happens when you don’t secure your firmware, when you encrypt it, and when you sign it. This topic will cover exactly how an attacker could bypass protection mechanisms when they are incorrectly implemented, and how they can be implemented well.
  • An analysis of Linux vs Real Time Operating Systems, demonstrating the security strengths and weaknesses between the two approaches and what can be done to improve the security of both.
  • A demonstration of weaknesses that can occur in hardware, demonstrating what can occur when electronics are designed in a manner which allows for easy debugging, including a demonstration of how firmware can easily be removed from a device when it is not adequately secured.
  • A discussion of how Open Source libraries can both increase and decrease security in a product, and how they can be used effectively.

Each element of this presentation will include working demonstrations in order to exemplify where the weaknesses lie in the standard approaches taken when creating an IOT product.

Christopher Wade is a seasoned security researcher and consultant. His main focuses are in reverse engineering hardware, finger-printing USB vulnerabilities and playing with Software Defined Radios, His key strength lies in firmware analysis, which he utilises as part of the hardware testing team at Pen Test Partners.

Should you choose Open Source Crypto?

What are the arguments for and against for using open source crypto code and how have they changed over time.

Glyn Wintle is CTO at dxwcyber, a security consultancy focused on attack. He has extensive experience of breaking into computer systems in both the public and private sector.

Why and How you should start using Onion Networking

The internet began as a network where any computer could communicate directly with any other; but today there are host firewalls, perimeter firewalls, content filters, NATs, DNS restrictions, BGP hijacks and all manner of other challenges that limit you and your computers’ ability to communicate. The Tor “Onion” networking protocol is an alternate “disintermediated” layer 3 stack where you do not require permission nor (mostly) any setup in order to communicate directly from/to any well-known address, plus you gain a host of security & operational benefits. We describe this.

Alec Muffett has worked in host and network security for 30 years, more than 22 of those in industry, holding senior consulting, architecture and engineering roles at Sun Microsystems and Facebook. He is a member of the Board of Directors of the Open Rights Group, a member of the Security and Privacy Executive of the British Computer Society, and a security engineer at Deliveroo.

Note: Please aim to arrive by 18:15 as the event will start at 18:30 prompt.

Inaugural London RISC-V meetup

This was the inaugural London meetup for the RISC-V community, hosted by the BCS Open Source Specialist Group and the UK Open Source Hardware User Group.  As with the other UK meetups, we provided an opportunity to share the latest ideas around the RISC-V ecosystem, combined with plenty of time for networking. However unlike other meetups, the London meetup had a specific focus on the open source aspects of RISC-V.

Note. Because of the impending BCS London office move, the venue was moved to the Watson-Watt room at the IET in Savoy Place, 4 minutes walk away.

At this evening meeting we had three talks on the OpenHW group, the LowRISC project and the XCrypt instruction set extension.  The talks are now available on our YouTube channel

Eventbrite - Open Source SG - London RISC-V Meetup

Tea/coffee will be served from 5:30pm, with talks starting at 6:00pm. Each talk will last 20-30 minutes and include plenty of time for questions, after which there will be opportunity to network both in the IET  and later at the Coal Hole pub over the road.

We shall be livestreaming and recording the talks for later posting on YouTube via GoToWebinar. To register for live streaming visit:

After registering, you will receive a confirmation email containing information about joining the webinar.

The LowRISC project

Alex Bradbury, @asbradbury

Alex talked about lowRISC, a non-profit community interest company, using collaborative engineering to develop and maintain open source silicon designs and tools.  Their expertise includes processor and SoC design, with a particular focus on hardware security, design verification, RISC-V tools, and the LLVM compiler.

Alex Bradbury is a Co-founder and Director of the lowRISC project. You may also be familiar with his LLVM work, and the LLVM Weekly newsletter. 

Open Source Processor IP for High Volume Production – the CORE-V Family
of RISC-V cores

Rick O’Connor, @rickoco

This session provides a brief overview of the RISC-V instruction set architecture and to describe the CORE-V family of open-source cores that implement the RISC-V ISA.  RISC-V (pronounced “risk-five”) is an open, free ISA enabling a new era of processor innovation through open standard collaboration.  Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.

CORE-V is a series of RISC-V based open-source processor cores with associated processor subsystem IP, tools and software for electronic system designers under the governance of the OpenHW Group.  The CORE-V family provides quality core IP in line with industry best practices in both silicon and FPGA optimized implementations.  These cores can be used to facilitate rapid design innovation and ensure effective
manufacturability of production SoCs.

Rick O’Connor is Executive Director of OpenHW

The XCrypt instruction set extension

Ben Marshall

Secure and efficient execution of cryptographic workloads is essential for any modern computer architecture. Particularly as more and more resource constrained devices need to communicate securely in potentially adversarial environments.  This talk will discuss some problems with the base RISC-V ISA from a cryptographic point of view, and how they can be improved.  Specifically we describe our work on XCrypto: a custom extension for general purpose cryptography, aimed at embedded RISC-V processors.

Ben Marshall is a Research Associate on the SCARV project.