The BCS OSSG and the OSHUG are hosting three talks which look at the design of Open Source chips and Open Source tools and materials to support their design.
The event will be held on Thursday 23rd October at BCS HQ – 5 Southampton Street, London, WC2E 7HA and will be preceded by the OSSG Annual General Meeting.
This event is free to attend for both BCS Members and non-members but booking is required.
The timetable for the evening will be:
- 17:30 – Registration & refreshments
- 18:00 – AGM (BCS OSSG members only)
- 18:30 – Open Source Chips talks (BCS members + non-members)
- 20:00 – Sandwiches + Networking
- 20:30 – Close
Silicon Chip Design for Teenagers
These days we expect school students to learn to write code, and teachers are turning to tools like Scratch (for primary education) and Python (for secondary education). But why stick to software languages. Why not teach coding in Verilog and get children to design silicon chips?
Earlier this year Dan Gorringe attended Chip Hack II in Cambridge. Inspired by this he spent two weeks work experience at Embecosm in August 2014 modifying the Chip Hack materials for use by Year 9-11 students. His resulting application note “Silicon Chip Design for Teenagers” is to be published very shortly by Embecosm.
In this talk, Dan will share his experience of learning silicon chip design, using Verilog for his first serious attempt at coding and encountering Mentor Graphics EDA tools for the first time.
Dan Gorringe has just started year 11 and faces the horrors of GCSE exams in 8 months time, so silicon chip design is just light relief. He has aspirations to a career in computing.
Cocotb, an Open Source Verification Framework
Verifying hardware designs has always been a significant challenge but very few open-source tools have emerged to support this effort. The recent advances in verification to facilitate complex designs often depend on specialist knowledge and expensive software tools. In this talk we will look at Cocotb, an open-source verification framework, and explore whether Python is a viable language for verification.
Chris Higgs has over a decade of experience working with FPGAs in various industries. His software background has shaped his approach to RTL design and verification and he now spends his time trying to bridge the divide between hardware and software development.
lowRISC – a Fully Open Source RISC-V System-on-Chip
The lowRISC project has been formed to produce a System-on-Chip which will be open source right down to the HDL, implementing the open RISC-V instruction set architecture. Volume manufacture of silicon manufacture is planned, along with creating and distributing low-cost development boards. This talk will describe the aims of the lowRISC project, summarise its current status, describe some of the features that are being implemented, and give details on how you can get involved.
Alex Bradbury is a researcher at the University of Cambridge Computer Laboratory where he works on compilation techniques for a novel many-core architecture. He writes LLVM Weekly, is co-author of Learning Python with Raspberry Pi, and has been a contributor to the Raspberry Pi project since the first alpha hardware was available.